Initial commit

2025-01-05 09:08:13 +01:00 · 2025-01-05 09:08:13 +01:00 · 19178fa456
commit 19178fa456
77 changed files with 1490 additions and 0 deletions
--- a/4_loesungen/01_logicsim/01_a3b_nor_aus_nand.lsim
+++ b/4_loesungen/01_logicsim/01_a3b_nor_aus_nand.lsim
--- a/4_loesungen/01_logicsim/02_a3c_not_aus_nand.lsim
+++ b/4_loesungen/01_logicsim/02_a3c_not_aus_nand.lsim
--- a/4_loesungen/01_logicsim/03_a3d_and_aus_nand.lsim
+++ b/4_loesungen/01_logicsim/03_a3d_and_aus_nand.lsim
--- a/4_loesungen/01_logicsim/04_a3e_or_aus_nand.lsim
+++ b/4_loesungen/01_logicsim/04_a3e_or_aus_nand.lsim
--- a/4_loesungen/01_logicsim/05_a3f_xor_aus_nand.lsim
+++ b/4_loesungen/01_logicsim/05_a3f_xor_aus_nand.lsim
--- a/4_loesungen/01_logicsim/06_a4a_d_flipflop_1.lsim
+++ b/4_loesungen/01_logicsim/06_a4a_d_flipflop_1.lsim
--- a/4_loesungen/01_logicsim/07_a4a_rs_flipflop.lsim
+++ b/4_loesungen/01_logicsim/07_a4a_rs_flipflop.lsim
--- a/4_loesungen/01_logicsim/08_a4b_d_flipflop_2.lsim
+++ b/4_loesungen/01_logicsim/08_a4b_d_flipflop_2.lsim
--- a/4_loesungen/01_logicsim/09_a5_4bit-xor.mod
+++ b/4_loesungen/01_logicsim/09_a5_4bit-xor.mod
--- a/4_loesungen/01_logicsim/10_a5a_4bit-xor.lsim
+++ b/4_loesungen/01_logicsim/10_a5a_4bit-xor.lsim
--- a/4_loesungen/01_logicsim/11_a5b_xor.lsim
+++ b/4_loesungen/01_logicsim/11_a5b_xor.lsim
--- a/4_loesungen/01_logicsim/12_a6a_halbaddierer.lsim
+++ b/4_loesungen/01_logicsim/12_a6a_halbaddierer.lsim
--- a/4_loesungen/01_logicsim/12_a6b_halbaddierer.mod
+++ b/4_loesungen/01_logicsim/12_a6b_halbaddierer.mod
--- a/4_loesungen/01_logicsim/13_a7a_volladdierer.lsim
+++ b/4_loesungen/01_logicsim/13_a7a_volladdierer.lsim
--- a/4_loesungen/01_logicsim/14_a7b_8bit_addierer.lsim
+++ b/4_loesungen/01_logicsim/14_a7b_8bit_addierer.lsim
--- a/4_loesungen/01_logicsim/15_a9_4bit_addierer.lsim
+++ b/4_loesungen/01_logicsim/15_a9_4bit_addierer.lsim